Home
last modified time | relevance | path

Searched refs:HAL_TXDESC_CTSENA (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/netif/ath/ath/
H A Dif_ath_tx_ht.c268 (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) in ath_tx_rate_fill_rcflags()
809 (HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA)) { in ath_tx_form_aggr()
834 ~ (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); in ath_tx_form_aggr()
837 (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); in ath_tx_form_aggr()
H A Dif_ath_tx.c1081 flags |= HAL_TXDESC_CTSENA; in ath_tx_calc_protection()
1268 (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) { in ath_tx_set_rtscts()
2177 flags |= HAL_TXDESC_CTSENA; in ath_tx_raw_start()
2212 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) in ath_tx_raw_start()
/dragonfly/sys/dev/netif/ath/ath_hal/
H A Dah_desc.h274 #define HAL_TXDESC_CTSENA 0x0008 /* enable CTS */ macro
/dragonfly/sys/dev/netif/ath/ath_hal/ar5416/
H A Dar5416_xmit.c337 #define RTSCTS (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA) in ar5416SetupTxDesc()
404 ads->ds_ctl0 |= (flags & HAL_TXDESC_CTSENA ? AR_CTSEnable : 0) in ar5416SetupTxDesc()
618 #define RTSCTS (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA) in ar5416SetupFirstTxDesc()
653 ads->ds_ctl0 |= (flags & HAL_TXDESC_CTSENA ? AR_CTSEnable : 0) in ar5416SetupFirstTxDesc()
883 if (flags & (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) { in ar5416Set11nRateScenario()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5212/
H A Dar5212_xmit.c704 #define RTSCTS (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA) in ar5212SetupTxDesc()
750 ads->ds_ctl0 |= (flags & HAL_TXDESC_CTSENA ? AR_CTSEnable : 0) in ar5212SetupTxDesc()
/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_xmit_ds.c718 if (flags & (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) { in ar9300_set_11n_rate_scenario()