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Searched refs:HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_TIMER__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/hdp/
H A Dhdp_4_0_sh_mask.h431 #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_TIMER__SHIFT 0x1 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_1_0_sh_mask.h559 #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_TIMER__SHIFT 0x00000001 macro
H A Doss_2_0_sh_mask.h2350 #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_TIMER__SHIFT 0x1 macro
H A Doss_2_4_sh_mask.h2418 #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_TIMER__SHIFT 0x1 macro
H A Doss_3_0_1_sh_mask.h3432 #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_TIMER__SHIFT 0x1 macro
H A Doss_3_0_sh_mask.h3534 #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_TIMER__SHIFT 0x1 macro