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Searched refs:HSW_CDCLK_LIMIT (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Dintel_cdclk.c410 else if (I915_READ(FUSE_STRAP) & HSW_CDCLK_LIMIT) in hsw_get_cdclk()
632 else if (I915_READ(FUSE_STRAP) & HSW_CDCLK_LIMIT) in bdw_get_cdclk()
2083 if (I915_READ(FUSE_STRAP) & HSW_CDCLK_LIMIT) in intel_update_max_cdclk()
H A Di915_reg.h6918 #define HSW_CDCLK_LIMIT (1 << 24) macro