Searched refs:HSW_WB_ELLC_LLC_AGE3 (Results 1 – 2 of 2) sorted by relevance
/dragonfly/sys/dev/drm/i915/ | ||
H A D | i915_gem_gtt.h | 102 #define HSW_WB_ELLC_LLC_AGE3 HSW_CACHEABILITY_CONTROL(0x8) macro |
H A D | i915_gem_gtt.c | 370 pte |= HSW_WB_ELLC_LLC_AGE3; in iris_pte_encode() |