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Searched refs:INTSTAT (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/netif/tx/
H A Dif_tx.c666 while (i-- && ((status = CSR_READ_4(sc, INTSTAT)) & INTSTAT_INT_ACTV)) { in epic_intr()
667 CSR_WRITE_4(sc, INTSTAT, status); in epic_intr()
1107 CSR_WRITE_4(sc, INTSTAT, CSR_READ_4(sc, INTSTAT)); in epic_init()
1239 status = CSR_READ_4(sc, INTSTAT) & (INTSTAT_TXIDLE | INTSTAT_RXIDLE); in epic_stop_activity()
1249 status = CSR_READ_4(sc, INTSTAT); in epic_stop_activity()
1320 if (CSR_READ_4(sc, INTSTAT) & INTSTAT_TXIDLE) in epic_queue_last_packet()
1325 if ((CSR_READ_4(sc, INTSTAT) & INTSTAT_TXIDLE) == 0) in epic_queue_last_packet()
H A Dif_txreg.h34 #define INTSTAT 0x0004 /* Interrupt status. See below */ macro