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Searched refs:MC_VM_L1_TLB_MCB_WR_PDMA_CNTL (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dr600.c1154 WREG32(MC_VM_L1_TLB_MCB_WR_PDMA_CNTL, tmp); in r600_pcie_gart_enable()
1200 WREG32(MC_VM_L1_TLB_MCB_WR_PDMA_CNTL, tmp); in r600_pcie_gart_disable()
1246 WREG32(MC_VM_L1_TLB_MCB_WR_PDMA_CNTL, tmp); in r600_agp_enable()
H A Dr600d.h363 #define MC_VM_L1_TLB_MCB_WR_PDMA_CNTL 0x221C macro