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Searched refs:MC_VM_L2_PERFCOUNTER1_CFG__ENABLE_MASK (Results 1 – 10 of 10) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_sh_mask.h4673 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 macro
H A Dgmc_8_2_sh_mask.h5587 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 macro
H A Dgmc_7_1_sh_mask.h5309 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 macro
H A Dgmc_8_1_sh_mask.h5747 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_sh_mask.h9632 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE_MASK … macro
H A Dmmhub_9_1_sh_mask.h9295 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE_MASK … macro
H A Dmmhub_9_3_0_sh_mask.h9722 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22514 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h23930 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h23933 #define MC_VM_L2_PERFCOUNTER1_CFG__ENABLE_MASK … macro