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Searched refs:MC_VM_MX_L1_PERFCOUNTER1_CFG__PERF_SEL__SHIFT (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_sh_mask.h7598 #define MC_VM_MX_L1_PERFCOUNTER1_CFG__PERF_SEL__SHIFT … macro
H A Dmmhub_9_1_sh_mask.h7050 #define MC_VM_MX_L1_PERFCOUNTER1_CFG__PERF_SEL__SHIFT … macro
H A Dmmhub_9_3_0_sh_mask.h7686 #define MC_VM_MX_L1_PERFCOUNTER1_CFG__PERF_SEL__SHIFT … macro