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Searched refs:MC_VM_NB_PCI_CTRL__MMIOENABLE__SHIFT (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
H A Dgmc_8_2_sh_mask.h6904 #define MC_VM_NB_PCI_CTRL__MMIOENABLE__SHIFT 0x17 macro
H A Dgmc_8_1_sh_mask.h7040 #define MC_VM_NB_PCI_CTRL__MMIOENABLE__SHIFT 0x17 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_sh_mask.h9980 #define MC_VM_NB_PCI_CTRL__MMIOENABLE__SHIFT … macro
H A Dmmhub_9_1_sh_mask.h9643 #define MC_VM_NB_PCI_CTRL__MMIOENABLE__SHIFT … macro
H A Dmmhub_9_3_0_sh_mask.h10110 #define MC_VM_NB_PCI_CTRL__MMIOENABLE__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h8447 #define MC_VM_NB_PCI_CTRL__MMIOENABLE__SHIFT … macro
H A Dgc_9_1_sh_mask.h8361 #define MC_VM_NB_PCI_CTRL__MMIOENABLE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h8184 #define MC_VM_NB_PCI_CTRL__MMIOENABLE__SHIFT … macro