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Searched refs:MP1_P2CMSG_INTSTS__INTSTS1__SHIFT (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/mp/
H A Dmp_10_0_sh_mask.h638 #define MP1_P2CMSG_INTSTS__INTSTS1__SHIFT … macro
H A Dmp_9_0_sh_mask.h1149 #define MP1_P2CMSG_INTSTS__INTSTS1__SHIFT 0x1 macro