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Searched refs:MY_TCRRCR (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/netif/my/
H A Dif_my.c334 rxfilt = CSR_READ_4(sc, MY_TCRRCR); in my_setmulti()
366 CSR_WRITE_4(sc, MY_TCRRCR, rxfilt); in my_setmulti()
719 MY_CLRBIT(sc, MY_TCRRCR, MY_PS10); in my_setcfg()
725 MY_SETBIT(sc, MY_TCRRCR, MY_FD); in my_setcfg()
727 MY_CLRBIT(sc, MY_TCRRCR, MY_FD); in my_setcfg()
1458 MY_SETBIT(sc, MY_TCRRCR, MY_AB); in my_init()
1460 MY_CLRBIT(sc, MY_TCRRCR, MY_AB); in my_init()
1470 MY_CLRBIT(sc, MY_TCRRCR, MY_RE); in my_init()
1480 MY_SETBIT(sc, MY_TCRRCR, MY_RE); in my_init()
1481 MY_CLRBIT(sc, MY_TCRRCR, MY_TE); in my_init()
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H A Dif_myreg.h40 #define MY_TCRRCR 0x18 /* receive & transmit configuration */ macro