1 /* 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 2001 4 * Bill Paul <wpaul@bsdi.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Bill Paul. 17 * 4. Neither the name of the author nor the names of any co-contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 * $FreeBSD: src/sys/dev/mii/nsgphyreg.h,v 1.1.2.1 2001/06/18 18:49:13 wpaul Exp $ 34 * $DragonFly: src/sys/dev/netif/mii_layer/nsgphyreg.h,v 1.2 2003/06/17 04:28:28 dillon Exp $ 35 */ 36 37 #ifndef _DEV_MII_NSGPHYREG_H_ 38 #define _DEV_MII_NSGPHYREG_H_ 39 40 /* 41 * NatSemi DP83891 registers 42 */ 43 44 #define NSGPHY_MII_BMCR 0x00 45 #define NSGPHY_BMCR_RESET 0x8000 46 #define NSGPHY_BMCR_LOOP 0x4000 47 #define NSGPHY_BMCR_SPD0 0x2000 /* speed select, lower bit */ 48 #define NSGPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */ 49 #define NSGPHY_BMCR_PDOWN 0x0800 /* Power down */ 50 #define NSGPHY_BMCR_ISO 0x0400 /* Isolate */ 51 #define NSGPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */ 52 #define NSGPHY_BMCR_FDX 0x0100 /* Duplex mode */ 53 #define NSGPHY_BMCR_CTEST 0x0080 /* Collision test enable */ 54 #define NSGPHY_BMCR_SPD1 0x0040 /* Speed select, upper bit */ 55 56 #define NSGPHY_S1000 NSGPHY_BMCR_SPD1 /* 1000mbps */ 57 #define NSGPHY_S100 NSGPHY_BMCR_SPD0 /* 100mpbs */ 58 #define NSGPHY_S10 0 /* 10mbps */ 59 60 #define NSGPHY_MII_BMSR 0x01 61 #define NSGPHY_BMSR_100BT4 0x8000 /* 100baseT4 support */ 62 #define NSGPHY_BMSR_100FDX 0x4000 /* 100baseTX full duplex */ 63 #define NSGPHY_BMSR_100HDX 0x2000 /* 100baseTX half duplex */ 64 #define NSGPHY_BMSR_10FDX 0x1000 /* 10baseT full duplex */ 65 #define NSGPHY_BMSR_10HDX 0x0800 /* 10baseT half duplex */ 66 #define NSGPHY_BMSR_100T2FDX 0x0400 /* 100baseT2 full duplex */ 67 #define NSGPHY_BMSR_100T2HDX 0x0200 /* 100baseT2 full duplex */ 68 #define NSGPHY_BMSR_EXTSTS 0x0100 /* 1000baseT Extended status present */ 69 #define NSGPHY_BMSR_PRESUB 0x0040 /* Preamble surpression */ 70 #define NSGPHY_BMSR_ACOMP 0x0020 /* Autoneg complete */ 71 #define NSGPHY_BMSR_RFAULT 0x0010 /* Remote fault condition occured */ 72 #define NSGPHY_BMSR_ANEG 0x0008 /* Autoneg capable */ 73 #define NSGPHY_BMSR_LINK 0x0004 /* Link status */ 74 #define NSGPHY_BMSR_JABBER 0x0002 /* Jabber detected */ 75 #define NSGPHY_BMSR_EXT 0x0001 /* Extended capability */ 76 77 #define NSGPHY_MII_ANAR 0x04 78 #define NSGPHY_ANAR_NP 0x8000 /* Next page */ 79 #define NSGPHY_ANAR_RF 0x2000 /* Remote fault */ 80 #define NSGPHY_ANAR_ASP 0x0800 /* Asymetric Pause */ 81 #define NSGPHY_ANAR_PC 0x0400 /* Pause capable */ 82 #define NSGPHY_ANAR_100T4 0x0200 /* 100baseT4 support */ 83 #define NSGPHY_ANAR_100FDX 0x0100 /* 100baseTX full duplex support */ 84 #define NSGPHY_ANAR_100HDX 0x0080 /* 100baseTX half duplex support */ 85 #define NSGPHY_ANAR_10FDX 0x0040 /* 10baseT full duplex support */ 86 #define NSGPHY_ANAR_10HDX 0x0020 /* 10baseT half duplex support */ 87 #define NSGPHY_ANAR_SEL 0x001F /* selector field, 00001=Ethernet */ 88 89 #define NSGPHY_MII_ANLPAR 0x05 90 #define NSGPHY_ANLPAR_NP 0x8000 /* Next page */ 91 #define NSGPHY_ANLPAR_RF 0x2000 /* Remote fault */ 92 #define NSGPHY_ANLPAR_ASP 0x0800 /* Asymetric Pause */ 93 #define NSGPHY_ANLPAR_PC 0x0400 /* Pause capable */ 94 #define NSGPHY_ANLPAR_100T4 0x0200 /* 100baseT4 support */ 95 #define NSGPHY_ANLPAR_100FDX 0x0100 /* 100baseTX full duplex support */ 96 #define NSGPHY_ANLPAR_100HDX 0x0080 /* 100baseTX half duplex support */ 97 #define NSGPHY_ANLPAR_10FDX 0x0040 /* 10baseT full duplex support */ 98 #define NSGPHY_ANLPAR_10HDX 0x0020 /* 10baseT half duplex support */ 99 #define NSGPHY_ANLPAR_SEL 0x001F /* selector field, 00001=Ethernet */ 100 101 #define NSGPHY_SEL_TYPE 0x0001 /* ethernet */ 102 103 #define NSGPHY_MII_ANER 0x06 104 #define NSGPHY_ANER_PDF 0x0010 /* Parallel detection fault */ 105 #define NSGPHY_ANER_LPNP 0x0008 /* Link partner can next page */ 106 #define NSGPHY_ANER_NP 0x0004 /* Local PHY can next page */ 107 #define NSGPHY_ANER_RX 0x0002 /* Next page received */ 108 #define NSGPHY_ANER_LPAN 0x0001 /* Link partner autoneg capable */ 109 110 #define NSGPHY_MII_NEXTP 0x07 /* Next page */ 111 #define NSGPHY_NEXTP_NP 0x8000 /* Next page indication */ 112 #define NSGPHY_NEXTP_MP 0x2000 /* Message page */ 113 #define NSGPHY_NEXTP_ACK2 0x1000 /* Acknowledge 2 */ 114 #define NSGPHY_NEXTP_TOGGLE 0x0800 /* Toggle */ 115 #define NSGPHY_NEXTP_CODE 0x07FF /* Code field */ 116 117 #define NSGPHY_MII_NEXTP_LP 0x08 /* Next page of link partner */ 118 #define NSGPHY_NEXTPLP_NP 0x8000 /* Next page indication */ 119 #define NSGPHY_NEXTPLP_MP 0x2000 /* Message page */ 120 #define NSGPHY_NEXTPLP_ACK2 0x1000 /* Acknowledge 2 */ 121 #define NSGPHY_NEXTPLP_TOGGLE 0x0800 /* Toggle */ 122 #define NSGPHY_NEXTPLP_CODE 0x07FF /* Code field */ 123 124 #define NSGPHY_MII_1000CTL 0x09 /* 1000baseT control */ 125 #define NSGPHY_1000CTL_TST 0xE000 /* test modes */ 126 #define NSGPHY_1000CTL_MSE 0x1000 /* Master/Slave config enable */ 127 #define NSGPHY_1000CTL_MSC 0x0800 /* Master/Slave setting */ 128 #define NSGPHY_1000CTL_RD 0x0400 /* Port type: Repeater/DTE */ 129 #define NSGPHY_1000CTL_AFD 0x0200 /* Advertise full duplex */ 130 #define NSGPHY_1000CTL_AHD 0x0100 /* Advertise half duplex */ 131 132 #define NSGPHY_MII_1000STS 0x0A /* 1000baseT status */ 133 #define NSGPHY_1000STS_MSF 0x8000 /* Master/slave fault */ 134 #define NSGPHY_1000STS_MSR 0x4000 /* Master/slave result */ 135 #define NSGPHY_1000STS_LRS 0x2000 /* Local receiver status */ 136 #define NSGPHY_1000STS_RRS 0x1000 /* Remote receiver status */ 137 #define NSGPHY_1000STS_LPFD 0x0800 /* Link partner can FD */ 138 #define NSGPHY_1000STS_LPHD 0x0400 /* Link partner can HD */ 139 #define NSGPHY_1000STS_ASM_DIR 0x0200 /* Asymetric pause capable */ 140 #define NSGPHY_1000STS_IEC 0x00FF /* Idle error count */ 141 142 #define NSGPHY_MII_EXTSTS 0x0F /* Extended status */ 143 #define NSGPHY_EXTSTS_X_FD_CAP 0x8000 /* 1000base-X FD capable */ 144 #define NSGPHY_EXTSTS_X_HD_CAP 0x4000 /* 1000base-X HD capable */ 145 #define NSGPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */ 146 #define NSGPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */ 147 148 #define NSGPHY_MII_STRAPOPT 0x10 /* Strap options */ 149 #define NSGPHY_STRAPOPT_PHYADDR 0xF800 /* PHY address */ 150 #define NSGPHY_STRAPOPT_COMPAT 0x0400 /* Broadcom compat mode */ 151 #define NSGPHY_STRAPOPT_MMSE 0x0200 /* Manual master/slave enable */ 152 #define NSGPHY_STRAPOPT_ANEG 0x0100 /* Autoneg enable */ 153 #define NSGPHY_STRAPOPT_MMSV 0x0080 /* Manual master/slave setting */ 154 #define NSGPHY_STRAPOPT_1000HDX 0x0010 /* Advertise 1000 half-duplex */ 155 #define NSGPHY_STRAPOPT_1000FDX 0x0008 /* Advertise 1000 full-duplex */ 156 #define NSGPHY_STRAPOPT_100_ADV 0x0004 /* Advertise 100 full/half-duplex */ 157 #define NSGPHY_STRAPOPT_SPDSEL 0x0003 /* speed selection */ 158 159 #define NSGPHY_MII_PHYSUP 0x11 /* PHY support/current status */ 160 #define NSGPHY_PHYSUP_SPDSTS 0x0018 /* speed status */ 161 #define NSGPHY_PHYSUP_LNKSTS 0x0004 /* link status */ 162 #define NSGPHY_PHYSUP_DUPSTS 0x0002 /* duplex status 1 == full */ 163 #define NSGPHY_PHYSUP_10BT 0x0001 /* 10baseT resolved */ 164 165 #define NSGPHY_SPDSTS_1000 0x0010 166 #define NSGPHY_SPDSTS_100 0x0008 167 #define NSGPHY_SPDSTS_10 0x0000 168 169 #endif /* _DEV_NSGPHY_MIIREG_H_ */ 170