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Searched refs:PACKET3_SET_CONFIG_REG_OFFSET (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dr600.c2852 radeon_ring_write(ring, ((scratch - PACKET3_SET_CONFIG_REG_OFFSET) >> 2)); in r600_ring_test()
2912 radeon_ring_write(ring, (WAIT_UNTIL - PACKET3_SET_CONFIG_REG_OFFSET) >> 2); in r600_fence_ring_emit()
2916 …ring_write(ring, ((rdev->fence_drv[fence->ring].scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET) >> 2)… in r600_fence_ring_emit()
3001 radeon_ring_write(ring, (WAIT_UNTIL - PACKET3_SET_CONFIG_REG_OFFSET) >> 2); in r600_copy_cpdma()
3021 radeon_ring_write(ring, (WAIT_UNTIL - PACKET3_SET_CONFIG_REG_OFFSET) >> 2); in r600_copy_cpdma()
3389 PACKET3_SET_CONFIG_REG_OFFSET) >> 2)); in r600_ring_ib_execute()
3430 ib.ptr[1] = ((scratch - PACKET3_SET_CONFIG_REG_OFFSET) >> 2); in r600_ib_test()
H A Dr600_cs.c1909 start_reg = (idx_value << 2) + PACKET3_SET_CONFIG_REG_OFFSET; in r600_packet3_check()
1911 if ((start_reg < PACKET3_SET_CONFIG_REG_OFFSET) || in r600_packet3_check()
H A Dr600d.h1687 #define PACKET3_SET_CONFIG_REG_OFFSET 0x00008000 macro