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Searched refs:PA_CL_CLIP_CNTL__UCP_ENA_3_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h5588 #define PA_CL_CLIP_CNTL__UCP_ENA_3_MASK 0x00000008L macro
H A Dgfx_7_2_sh_mask.h5571 #define PA_CL_CLIP_CNTL__UCP_ENA_3_MASK 0x8 macro
H A Dgfx_8_0_sh_mask.h6359 #define PA_CL_CLIP_CNTL__UCP_ENA_3_MASK 0x8 macro
H A Dgfx_8_1_sh_mask.h6893 #define PA_CL_CLIP_CNTL__UCP_ENA_3_MASK 0x8 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h16786 #define PA_CL_CLIP_CNTL__UCP_ENA_3_MASK … macro
H A Dgc_9_1_sh_mask.h18220 #define PA_CL_CLIP_CNTL__UCP_ENA_3_MASK … macro
H A Dgc_9_2_1_sh_mask.h18096 #define PA_CL_CLIP_CNTL__UCP_ENA_3_MASK … macro