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Searched refs:PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h5683 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h5622 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h6410 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h6944 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15349 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT … macro
H A Dgc_9_1_sh_mask.h16783 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h16655 #define PA_CL_UCP_1_Y__DATA_REGISTER__SHIFT … macro