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Searched refs:PA_CL_UCP_3_Z__DATA_REGISTER_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h5700 #define PA_CL_UCP_3_Z__DATA_REGISTER_MASK 0xffffffffL macro
H A Dgfx_7_2_sh_mask.h5639 #define PA_CL_UCP_3_Z__DATA_REGISTER_MASK 0xffffffff macro
H A Dgfx_8_0_sh_mask.h6427 #define PA_CL_UCP_3_Z__DATA_REGISTER_MASK 0xffffffff macro
H A Dgfx_8_1_sh_mask.h6961 #define PA_CL_UCP_3_Z__DATA_REGISTER_MASK 0xffffffff macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15377 #define PA_CL_UCP_3_Z__DATA_REGISTER_MASK … macro
H A Dgc_9_1_sh_mask.h16811 #define PA_CL_UCP_3_Z__DATA_REGISTER_MASK … macro
H A Dgc_9_2_1_sh_mask.h16683 #define PA_CL_UCP_3_Z__DATA_REGISTER_MASK … macro