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Searched refs:PA_SU_PERFCOUNTER1_SELECT__CNTR_MODE__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h6893 #define PA_SU_PERFCOUNTER1_SELECT__CNTR_MODE__SHIFT 0x00000014 macro
H A Dgfx_7_2_sh_mask.h5796 #define PA_SU_PERFCOUNTER1_SELECT__CNTR_MODE__SHIFT 0x14 macro
H A Dgfx_8_0_sh_mask.h6584 #define PA_SU_PERFCOUNTER1_SELECT__CNTR_MODE__SHIFT 0x14 macro
H A Dgfx_8_1_sh_mask.h7118 #define PA_SU_PERFCOUNTER1_SELECT__CNTR_MODE__SHIFT 0x14 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21364 #define PA_SU_PERFCOUNTER1_SELECT__CNTR_MODE__SHIFT … macro
H A Dgc_9_1_sh_mask.h22800 #define PA_SU_PERFCOUNTER1_SELECT__CNTR_MODE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h22747 #define PA_SU_PERFCOUNTER1_SELECT__CNTR_MODE__SHIFT … macro