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Searched refs:PA_SU_PERFCOUNTER2_SELECT__CNTR_MODE_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h6902 #define PA_SU_PERFCOUNTER2_SELECT__CNTR_MODE_MASK 0x00f00000L macro
H A Dgfx_7_2_sh_mask.h5803 #define PA_SU_PERFCOUNTER2_SELECT__CNTR_MODE_MASK 0xf00000 macro
H A Dgfx_8_0_sh_mask.h6591 #define PA_SU_PERFCOUNTER2_SELECT__CNTR_MODE_MASK 0xf00000 macro
H A Dgfx_8_1_sh_mask.h7125 #define PA_SU_PERFCOUNTER2_SELECT__CNTR_MODE_MASK 0xf00000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21377 #define PA_SU_PERFCOUNTER2_SELECT__CNTR_MODE_MASK … macro
H A Dgc_9_1_sh_mask.h22813 #define PA_SU_PERFCOUNTER2_SELECT__CNTR_MODE_MASK … macro
H A Dgc_9_2_1_sh_mask.h22769 #define PA_SU_PERFCOUNTER2_SELECT__CNTR_MODE_MASK … macro