Searched refs:PCH_DPLL (Results 1 – 3 of 3) sorted by relevance
349 val = I915_READ(PCH_DPLL(pll->id)); in ibx_pch_dpll_get_hw_state()385 I915_WRITE(PCH_DPLL(pll->id), pll->state.hw_state.dpll); in ibx_pch_dpll_enable()388 POSTING_READ(PCH_DPLL(pll->id)); in ibx_pch_dpll_enable()396 I915_WRITE(PCH_DPLL(pll->id), pll->state.hw_state.dpll); in ibx_pch_dpll_enable()397 POSTING_READ(PCH_DPLL(pll->id)); in ibx_pch_dpll_enable()413 I915_WRITE(PCH_DPLL(pll->id), 0); in ibx_pch_dpll_disable()414 POSTING_READ(PCH_DPLL(pll->id)); in ibx_pch_dpll_disable()
7255 #define PCH_DPLL(pll) _MMIO(pll == 0 ? _PCH_DPLL_A : _PCH_DPLL_B) macro
7640 u32 temp = I915_READ(PCH_DPLL(i)); in ironlake_init_pch_refclk()