Searched refs:PCH_DPLL_SEL (Results 1 – 2 of 2) sorted by relevance
4508 temp = I915_READ(PCH_DPLL_SEL); in ironlake_pch_enable()4516 I915_WRITE(PCH_DPLL_SEL, temp); in ironlake_pch_enable()5525 temp = I915_READ(PCH_DPLL_SEL); in ironlake_crtc_disable()5527 I915_WRITE(PCH_DPLL_SEL, temp); in ironlake_crtc_disable()8649 tmp = I915_READ(PCH_DPLL_SEL); in ironlake_get_pipe_config()
7306 #define PCH_DPLL_SEL _MMIO(0xc7000) macro