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Searched refs:PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h6843 #define PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS__SHIFT 0x00000006 macro
H A Dbif_4_1_sh_mask.h2044 #define PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS__SHIFT 0x6 macro
H A Dbif_5_0_sh_mask.h2610 #define PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS__SHIFT 0x6 macro
H A Dbif_5_1_sh_mask.h3000 #define PCIE_INT_STATUS__POWER_STATE_CHG_INT_STATUS__SHIFT 0x6 macro