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Searched refs:PHY_AUX_CNTL__AUXSLAVE_PAD_MODE__SHIFT (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h4060 #define PHY_AUX_CNTL__AUXSLAVE_PAD_MODE__SHIFT 0x3 macro
H A Ddce_11_0_sh_mask.h4174 #define PHY_AUX_CNTL__AUXSLAVE_PAD_MODE__SHIFT 0x3 macro
H A Ddce_11_2_sh_mask.h4618 #define PHY_AUX_CNTL__AUXSLAVE_PAD_MODE__SHIFT 0x3 macro
H A Ddce_12_0_sh_mask.h10565 #define PHY_AUX_CNTL__AUXSLAVE_PAD_MODE__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h41175 #define PHY_AUX_CNTL__AUXSLAVE_PAD_MODE__SHIFT … macro