Home
last modified time | relevance | path

Searched refs:PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h4053 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK 0x1 macro
H A Ddce_11_0_sh_mask.h4167 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK 0x1 macro
H A Ddce_11_2_sh_mask.h4611 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK 0x1 macro
H A Ddce_12_0_sh_mask.h10577 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h41187 #define PHY_AUX_CNTL__AUXSLAVE_PAD_SLEWN_MASK … macro