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Searched refs:PIXEL_PIPE_STAT_CONTROL (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dcikd.h1605 # define PIXEL_PIPE_STAT_CONTROL (56 << 0) macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_enum.h4830 PIXEL_PIPE_STAT_CONTROL = 0x38, enumerator
H A Dgfx_8_0_enum.h5313 PIXEL_PIPE_STAT_CONTROL = 0x38, enumerator
H A Dgfx_8_1_enum.h5382 PIXEL_PIPE_STAT_CONTROL = 0x38, enumerator
/dragonfly/sys/dev/drm/amd/include/
H A Dvega10_enum.h15501 PIXEL_PIPE_STAT_CONTROL = 0x00000038, enumerator