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Searched refs:PLL_POWER_STATE_IN_TXS2_0 (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dsid.h1424 # define PLL_POWER_STATE_IN_TXS2_0(x) ((x) << 7) macro
H A Dcikd.h310 # define PLL_POWER_STATE_IN_TXS2_0(x) ((x) << 7) macro
H A Devergreend.h1442 # define PLL_POWER_STATE_IN_TXS2_0(x) ((x) << 7) macro
H A Devergreen.c5459 data |= PLL_POWER_STATE_IN_OFF_0(7) | PLL_POWER_STATE_IN_TXS2_0(7); in evergreen_program_aspm()
5471 data |= PLL_POWER_STATE_IN_OFF_0(7) | PLL_POWER_STATE_IN_TXS2_0(7); in evergreen_program_aspm()
H A Dsi.c7290 data |= PLL_POWER_STATE_IN_OFF_0(7) | PLL_POWER_STATE_IN_TXS2_0(7); in si_program_aspm()
7302 data |= PLL_POWER_STATE_IN_OFF_0(7) | PLL_POWER_STATE_IN_TXS2_0(7); in si_program_aspm()
H A Dcik.c9681 data |= PLL_POWER_STATE_IN_OFF_0(7) | PLL_POWER_STATE_IN_TXS2_0(7); in cik_program_aspm()
9693 data |= PLL_POWER_STATE_IN_OFF_0(7) | PLL_POWER_STATE_IN_TXS2_0(7); in cik_program_aspm()