Searched refs:PPCLK_UCLK (Results 1 – 2 of 2) sorted by relevance
| /dragonfly/sys/dev/drm/amd/powerplay/hwmgr/ |
| H A D | vega12_hwmgr.c | 579 ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_UCLK); in vega12_setup_default_dpm_tables()
1025 (PPCLK_UCLK << 16) | (min_freq & 0xffff))), in vega12_upload_dpm_min_level()
1032 (PPCLK_UCLK << 16) | (min_freq & 0xffff))), in vega12_upload_dpm_min_level()
1100 (PPCLK_UCLK << 16) | (max_freq & 0xffff))), in vega12_upload_dpm_max_level()
1196 vega12_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, false) == 0, in vega12_dpm_get_mclk()
1201 vega12_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, true) == 0, in vega12_dpm_get_mclk()
1249 smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetDpmClockFreq, (PPCLK_UCLK << 16)) == 0, in vega12_get_current_mclk_freq()
2078 (PPCLK_UCLK << 16 ) | dpm_table->dpm_state.hard_min_level)), in vega12_set_uclk_to_highest_dpm_level()
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| /dragonfly/sys/dev/drm/amd/powerplay/inc/vega12/ |
| H A D | smu9_driver_if.h | 224 PPCLK_UCLK, enumerator
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