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Searched refs:PPLL_VREG_CFG__pw_pc_bleeder_en__SHIFT (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_11_2_sh_mask.h18331 #define PPLL_VREG_CFG__pw_pc_bleeder_en__SHIFT 0x1 macro
H A Ddce_12_0_sh_mask.h324 #define PPLL_VREG_CFG__pw_pc_bleeder_en__SHIFT macro