Home
last modified time | relevance | path

Searched refs:PP_STATE_SUPPORT_CG (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dsmu7_clockpowergating.c177 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
200 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
250 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
271 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
294 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
318 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
341 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
365 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
389 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dvi.c1372 pp_support_state |= PP_STATE_SUPPORT_CG; in vi_common_set_clockgating_state_by_smu()
1391 pp_support_state |= PP_STATE_SUPPORT_CG; in vi_common_set_clockgating_state_by_smu()
1410 pp_support_state |= PP_STATE_SUPPORT_CG; in vi_common_set_clockgating_state_by_smu()
1445 PP_STATE_SUPPORT_CG, in vi_common_set_clockgating_state_by_smu()
1475 PP_STATE_SUPPORT_CG, in vi_common_set_clockgating_state_by_smu()
H A Dgfx_v8_0.c6112 pp_support_state |= PP_STATE_SUPPORT_CG; in gfx_v8_0_tonga_update_gfx_clock_gating()
6133 pp_support_state |= PP_STATE_SUPPORT_CG; in gfx_v8_0_tonga_update_gfx_clock_gating()
6164 pp_support_state |= PP_STATE_SUPPORT_CG; in gfx_v8_0_polaris_update_gfx_clock_gating()
6184 pp_support_state |= PP_STATE_SUPPORT_CG; in gfx_v8_0_polaris_update_gfx_clock_gating()
6205 pp_support_state |= PP_STATE_SUPPORT_CG; in gfx_v8_0_polaris_update_gfx_clock_gating()
/dragonfly/sys/dev/drm/amd/include/
H A Dkgd_pp_interface.h180 #define PP_STATE_SUPPORT_CG 0x10 macro