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Searched refs:PRIV_INSTR_INT_ENABLE (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dcikd.h1334 # define PRIV_INSTR_INT_ENABLE (1 << 22) macro
H A Dcik.c7086 cp_int_cntl |= PRIV_INSTR_INT_ENABLE | PRIV_REG_INT_ENABLE; in cik_irq_set()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dgfx_v9_0.c4443 PRIV_INSTR_INT_ENABLE, in gfx_v9_0_set_priv_inst_fault_state()
H A Dgfx_v8_0.c6822 WREG32_FIELD(CP_INT_CNTL_RING0, PRIV_INSTR_INT_ENABLE, in gfx_v8_0_set_priv_inst_fault_state()