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Searched refs:PWR_CKS_ENABLE__masterReset_MASK (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_7_1_2_sh_mask.h5505 #define PWR_CKS_ENABLE__masterReset_MASK 0x2 macro
H A Dsmu_7_1_3_sh_mask.h5607 #define PWR_CKS_ENABLE__masterReset_MASK 0x2 macro