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Searched refs:RADEON_M_SPLL_REF_FB_DIV (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dradeon_clocks.c41 fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_get_engine_clock()
47 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK; in radeon_legacy_get_engine_clock()
71 fb_div = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_get_memory_clock()
77 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK; in radeon_legacy_get_memory_clock()
148 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in radeon_read_clocks_OF()
212 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in radeon_get_clock_info()
264 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in radeon_get_clock_info()
356 RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & in calc_eng_mem_clock()
418 tmp = RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV); in radeon_legacy_set_engine_clock()
421 WREG32_PLL(RADEON_M_SPLL_REF_FB_DIV, tmp); in radeon_legacy_set_engine_clock()
H A Dradeon_reg.h1647 #define RADEON_M_SPLL_REF_FB_DIV 0x000a /* PLL */ macro