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Searched refs:RADEON_PIXCLKS_CNTL (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dradeon_clocks.c527 tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL); in radeon_legacy_set_clock_gating()
541 WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); in radeon_legacy_set_clock_gating()
594 WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); in radeon_legacy_set_clock_gating()
716 tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL); in radeon_legacy_set_clock_gating()
725 WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); in radeon_legacy_set_clock_gating()
770 tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL); in radeon_legacy_set_clock_gating()
785 WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); in radeon_legacy_set_clock_gating()
821 tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL); in radeon_legacy_set_clock_gating()
836 WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); in radeon_legacy_set_clock_gating()
894 tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL); in radeon_legacy_set_clock_gating()
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H A Dradeon_legacy_crtc.c857 uint32_t pixclks_cntl = ((RREG32_PLL(RADEON_PIXCLKS_CNTL) & in radeon_set_pll()
867 WREG32_PLL_P(RADEON_PIXCLKS_CNTL, in radeon_set_pll()
915 WREG32_PLL_P(RADEON_PIXCLKS_CNTL, in radeon_set_pll()
919 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); in radeon_set_pll()
925 pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); in radeon_set_pll()
1025 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); in radeon_set_pll()
H A Dradeon_legacy_encoders.c108 pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); in radeon_legacy_lvds_update()
109 WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb); in radeon_legacy_lvds_update()
121 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); in radeon_legacy_lvds_update()
1583 pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); in radeon_legacy_tv_dac_detect()
1602 WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); in radeon_legacy_tv_dac_detect()
1676 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); in radeon_legacy_tv_dac_detect()
H A Dradeon_reg.h1533 #define RADEON_PIXCLKS_CNTL 0x002d macro