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Searched refs:RADEON_PIXCLK_LVDS_ALWAYS_ONb (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dradeon_clocks.c535 RADEON_PIXCLK_LVDS_ALWAYS_ONb | in radeon_legacy_set_clock_gating()
588 RADEON_PIXCLK_LVDS_ALWAYS_ONb | in radeon_legacy_set_clock_gating()
722 RADEON_PIXCLK_LVDS_ALWAYS_ONb | in radeon_legacy_set_clock_gating()
778 RADEON_PIXCLK_LVDS_ALWAYS_ONb | in radeon_legacy_set_clock_gating()
829 RADEON_PIXCLK_LVDS_ALWAYS_ONb | in radeon_legacy_set_clock_gating()
900 RADEON_PIXCLK_LVDS_ALWAYS_ONb | in radeon_legacy_set_clock_gating()
H A Dradeon_legacy_encoders.c109 WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb); in radeon_legacy_lvds_update()
H A Dradeon_reg.h1548 # define RADEON_PIXCLK_LVDS_ALWAYS_ONb (1 << 14) macro