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Searched refs:RADEON_RB_RPTR_WR_ENA (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Drs600.c467 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); in rs600_asic_reset()
H A Dr300.c422 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); in r300_asic_reset()
H A Dradeon_reg.h3306 # define RADEON_RB_RPTR_WR_ENA (1 << 31) macro
H A Dr100.c1191 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA | RADEON_RB_NO_UPDATE); in r100_cp_init()
2582 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); in r100_asic_reset()