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Searched refs:RADEON_SPLL_CNTL (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dradeon_clocks.c406 tmp = RREG32_PLL(RADEON_SPLL_CNTL); in radeon_legacy_set_engine_clock()
408 WREG32_PLL(RADEON_SPLL_CNTL, tmp); in radeon_legacy_set_engine_clock()
412 tmp = RREG32_PLL(RADEON_SPLL_CNTL); in radeon_legacy_set_engine_clock()
414 WREG32_PLL(RADEON_SPLL_CNTL, tmp); in radeon_legacy_set_engine_clock()
424 tmp = RREG32_PLL(RADEON_SPLL_CNTL); in radeon_legacy_set_engine_clock()
430 WREG32_PLL(RADEON_SPLL_CNTL, tmp); in radeon_legacy_set_engine_clock()
432 tmp = RREG32_PLL(RADEON_SPLL_CNTL); in radeon_legacy_set_engine_clock()
434 WREG32_PLL(RADEON_SPLL_CNTL, tmp); in radeon_legacy_set_engine_clock()
438 tmp = RREG32_PLL(RADEON_SPLL_CNTL); in radeon_legacy_set_engine_clock()
440 WREG32_PLL(RADEON_SPLL_CNTL, tmp); in radeon_legacy_set_engine_clock()
H A Dradeon_reg.h1654 #define RADEON_SPLL_CNTL 0x000c /* PLL */ macro