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Searched refs:RESYNC_CNTL (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce/
H A Ddce_clock_source.h34 SRI(RESYNC_CNTL, PIXCLK, id), \
38 SRI(RESYNC_CNTL, PIXCLK, id), \
103 uint32_t RESYNC_CNTL; member
H A Ddce_clock_source.c825 REG_UPDATE(RESYNC_CNTL, in dce110_program_pixel_clk_resync()
838 REG_UPDATE(RESYNC_CNTL, in dce110_program_pixel_clk_resync()
842 REG_UPDATE(RESYNC_CNTL, in dce110_program_pixel_clk_resync()
846 REG_UPDATE(RESYNC_CNTL, in dce110_program_pixel_clk_resync()
850 REG_UPDATE(RESYNC_CNTL, in dce110_program_pixel_clk_resync()