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Searched refs:RIRB_CONTROL__RIRB_DMA_ENABLE_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h11511 #define RIRB_CONTROL__RIRB_DMA_ENABLE_MASK 0x2 macro
H A Ddce_10_0_sh_mask.h12613 #define RIRB_CONTROL__RIRB_DMA_ENABLE_MASK 0x2 macro
H A Ddce_11_0_sh_mask.h12619 #define RIRB_CONTROL__RIRB_DMA_ENABLE_MASK 0x2 macro
H A Ddce_11_2_sh_mask.h13235 #define RIRB_CONTROL__RIRB_DMA_ENABLE_MASK 0x2 macro
H A Ddce_12_0_sh_mask.h56088 #define RIRB_CONTROL__RIRB_DMA_ENABLE_MASK … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h963 #define RIRB_CONTROL__RIRB_DMA_ENABLE_MASK … macro