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Searched refs:RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dgfx_v9_0.c3638 RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK; in gfx_v9_0_update_3d_clock_gating()
3655 data &= ~(RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK | in gfx_v9_0_update_3d_clock_gating()
3842 if (data & RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK) in gfx_v9_0_get_clockgating_state()
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23624 #define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK … macro
H A Dgc_9_1_sh_mask.h25040 #define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK … macro
H A Dgc_9_2_1_sh_mask.h25103 #define RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK … macro