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Searched refs:RLC_CLK_CNTL__RLC_SPM_CLK_CNTL__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h9138 #define RLC_CLK_CNTL__RLC_SPM_CLK_CNTL__SHIFT 0x1 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h27159 #define RLC_CLK_CNTL__RLC_SPM_CLK_CNTL__SHIFT … macro
H A Dgc_9_1_sh_mask.h28571 #define RLC_CLK_CNTL__RLC_SPM_CLK_CNTL__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h28902 #define RLC_CLK_CNTL__RLC_SPM_CLK_CNTL__SHIFT … macro