Home
last modified time | relevance | path

Searched refs:RLC_CNTL (Results 1 – 10 of 10) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dsi.c5195 orig = data = RREG32(RLC_CNTL); in si_halt_rlc()
5199 WREG32(RLC_CNTL, data); in si_halt_rlc()
5211 tmp = RREG32(RLC_CNTL); in si_update_rlc()
5213 WREG32(RLC_CNTL, rlc); in si_update_rlc()
5807 WREG32(RLC_CNTL, 0); in si_rlc_stop()
5816 WREG32(RLC_CNTL, RLC_ENABLE); in si_rlc_start()
H A Dr600.c1695 WREG32(RLC_CNTL, 0); in r600_gpu_soft_reset()
1827 WREG32(RLC_CNTL, 0); in r600_gpu_pci_config_reset()
3557 WREG32(RLC_CNTL, 0); in r600_rlc_stop()
3562 WREG32(RLC_CNTL, RLC_ENABLE); in r600_rlc_start()
H A Dsid.h1300 #define RLC_CNTL 0xC300 macro
H A Dcik.c5848 tmp = RREG32(RLC_CNTL); in cik_update_rlc()
5850 WREG32(RLC_CNTL, rlc); in cik_update_rlc()
5857 orig = data = RREG32(RLC_CNTL); in cik_halt_rlc()
5863 WREG32(RLC_CNTL, data); in cik_halt_rlc()
5915 WREG32(RLC_CNTL, 0); in cik_rlc_stop()
5931 WREG32(RLC_CNTL, RLC_ENABLE); in cik_rlc_start()
H A Dcikd.h1393 #define RLC_CNTL 0xC300 macro
H A Devergreend.h384 #define RLC_CNTL 0x3f00 macro
H A Dr600d.h685 #define RLC_CNTL 0x3f00 macro
H A Devergreen.c4359 WREG32(RLC_CNTL, mask); in evergreen_rlc_start()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dgfx_v9_0.c2210 WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 0); in gfx_v9_0_rlc_stop()
2229 WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1); in gfx_v9_0_rlc_start()
H A Dgfx_v8_0.c4177 WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 0); in gfx_v8_0_rlc_stop()
4194 WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 1); in gfx_v8_0_rlc_start()