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Searched refs:RLC_GPM_PERF_COUNT_0__CU_INDEX_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8109 #define RLC_GPM_PERF_COUNT_0__CU_INDEX_MASK 0xf000 macro
H A Dgfx_8_0_sh_mask.h9021 #define RLC_GPM_PERF_COUNT_0__CU_INDEX_MASK 0xf000 macro
H A Dgfx_8_1_sh_mask.h9561 #define RLC_GPM_PERF_COUNT_0__CU_INDEX_MASK 0xf000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19690 #define RLC_GPM_PERF_COUNT_0__CU_INDEX_MASK … macro
H A Dgc_9_1_sh_mask.h21126 #define RLC_GPM_PERF_COUNT_0__CU_INDEX_MASK … macro
H A Dgc_9_2_1_sh_mask.h21053 #define RLC_GPM_PERF_COUNT_0__CU_INDEX_MASK … macro