Home
last modified time | relevance | path

Searched refs:RLC_PG_CNTL__RESERVED1__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7235 #define RLC_PG_CNTL__RESERVED1__SHIFT 0x00000013 macro
H A Dgfx_7_2_sh_mask.h7856 #define RLC_PG_CNTL__RESERVED1__SHIFT 0x13 macro
H A Dgfx_8_0_sh_mask.h8768 #define RLC_PG_CNTL__RESERVED1__SHIFT 0x15 macro
H A Dgfx_8_1_sh_mask.h9318 #define RLC_PG_CNTL__RESERVED1__SHIFT 0x14 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22936 #define RLC_PG_CNTL__RESERVED1__SHIFT … macro
H A Dgc_9_1_sh_mask.h24352 #define RLC_PG_CNTL__RESERVED1__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h24403 #define RLC_PG_CNTL__RESERVED1__SHIFT … macro