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Searched refs:RLC_SPM_PERFMON_CNTL__RESERVED1__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8168 #define RLC_SPM_PERFMON_CNTL__RESERVED1__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h9250 #define RLC_SPM_PERFMON_CNTL__RESERVED1__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h9814 #define RLC_SPM_PERFMON_CNTL__RESERVED1__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22172 #define RLC_SPM_PERFMON_CNTL__RESERVED1__SHIFT … macro
H A Dgc_9_1_sh_mask.h23608 #define RLC_SPM_PERFMON_CNTL__RESERVED1__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h23603 #define RLC_SPM_PERFMON_CNTL__RESERVED1__SHIFT … macro