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Searched refs:RMI_PERF_COUNTER_CNTL__EVENT_BASED_PERF_EN_SEL__SHIFT (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22434 #define RMI_PERF_COUNTER_CNTL__EVENT_BASED_PERF_EN_SEL__SHIFT … macro
H A Dgc_9_1_sh_mask.h23850 #define RMI_PERF_COUNTER_CNTL__EVENT_BASED_PERF_EN_SEL__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h23853 #define RMI_PERF_COUNTER_CNTL__EVENT_BASED_PERF_EN_SEL__SHIFT … macro