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Searched refs:RS400_DMIF_MEM_CNTL1 (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dr100.c3544 temp = RREG32(RS400_DMIF_MEM_CNTL1); in r100_bandwidth_update()
3547 WREG32(RS400_DMIF_MEM_CNTL1, (temp | in r100_bandwidth_update()
3645 WREG32(RS400_DMIF_MEM_CNTL1, 0x29CA71DC); in r100_bandwidth_update()
H A Dradeon_reg.h3666 #define RS400_DMIF_MEM_CNTL1 0xe38 macro