Home
last modified time | relevance | path

Searched refs:SDMA0_CLK_CTRL (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dcik.c6205 WREG32(SDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET, 0x00000100); in cik_enable_sdma_mgcg()
6206 WREG32(SDMA0_CLK_CTRL + SDMA1_REGISTER_OFFSET, 0x00000100); in cik_enable_sdma_mgcg()
6208 orig = data = RREG32(SDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET); in cik_enable_sdma_mgcg()
6211 WREG32(SDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET, data); in cik_enable_sdma_mgcg()
6213 orig = data = RREG32(SDMA0_CLK_CTRL + SDMA1_REGISTER_OFFSET); in cik_enable_sdma_mgcg()
6216 WREG32(SDMA0_CLK_CTRL + SDMA1_REGISTER_OFFSET, data); in cik_enable_sdma_mgcg()
H A Dcikd.h1958 #define SDMA0_CLK_CTRL 0xD00C macro