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Searched refs:SEM_EDC_CONFIG__DIS_EDC_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Dosssys_4_0_sh_mask.h1181 #define SEM_EDC_CONFIG__DIS_EDC_MASK … macro
H A Dosssys_4_0_1_sh_mask.h1234 #define SEM_EDC_CONFIG__DIS_EDC_MASK … macro
H A Doss_2_0_sh_mask.h229 #define SEM_EDC_CONFIG__DIS_EDC_MASK 0x2 macro
H A Doss_2_4_sh_mask.h243 #define SEM_EDC_CONFIG__DIS_EDC_MASK 0x2 macro
H A Doss_3_0_1_sh_mask.h241 #define SEM_EDC_CONFIG__DIS_EDC_MASK 0x2 macro
H A Doss_3_0_sh_mask.h365 #define SEM_EDC_CONFIG__DIS_EDC_MASK 0x2 macro