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Searched refs:SIS_CSR (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/netif/sis/
H A Dif_sis.c237 CSR_READ_4(sc, SIS_CSR); in sis_delay()
421 csrsave = CSR_READ_4(sc, SIS_CSR); in sis_read_mac()
423 CSR_WRITE_4(sc, SIS_CSR, SIS_CSR_RELOAD | filtsave); in sis_read_mac()
424 CSR_WRITE_4(sc, SIS_CSR, 0); in sis_read_mac()
436 CSR_WRITE_4(sc, SIS_CSR, csrsave); in sis_read_mac()
870 SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RESET); in sis_reset()
873 if (!(CSR_READ_4(sc, SIS_CSR) & SIS_CSR_RESET)) in sis_reset()
1535 SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RX_ENABLE); in sis_npoll_compat()
1614 SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RX_ENABLE); in sis_intr()
1750 SIS_SETBIT(sc, SIS_CSR, SIS_CSR_TX_ENABLE); in sis_start()
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H A Dif_sisreg.h46 #define SIS_CSR 0x00 macro