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Searched refs:SPI_ARB_CYCLES_0__TS0_DURATION_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7438 #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK 0x0000ffffL macro
H A Dgfx_7_2_sh_mask.h8785 #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK 0xffff macro
H A Dgfx_8_0_sh_mask.h10387 #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK 0xffff macro
H A Dgfx_8_1_sh_mask.h10785 #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK 0xffff macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12098 #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK macro
H A Dgc_9_1_sh_mask.h13653 #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK macro
H A Dgc_9_2_1_sh_mask.h13403 #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK macro