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Searched refs:SPI_ARB_PRIORITY__PIPE_ORDER_TS0_MASK (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7446 #define SPI_ARB_PRIORITY__PIPE_ORDER_TS0_MASK 0x00000007L macro
H A Dgfx_7_2_sh_mask.h8769 #define SPI_ARB_PRIORITY__PIPE_ORDER_TS0_MASK 0x7 macro
H A Dgfx_8_0_sh_mask.h10371 #define SPI_ARB_PRIORITY__PIPE_ORDER_TS0_MASK 0x7 macro
H A Dgfx_8_1_sh_mask.h10769 #define SPI_ARB_PRIORITY__PIPE_ORDER_TS0_MASK 0x7 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12087 #define SPI_ARB_PRIORITY__PIPE_ORDER_TS0_MASK … macro
H A Dgc_9_1_sh_mask.h13642 #define SPI_ARB_PRIORITY__PIPE_ORDER_TS0_MASK … macro
H A Dgc_9_2_1_sh_mask.h13392 #define SPI_ARB_PRIORITY__PIPE_ORDER_TS0_MASK … macro